Wide dynamic range operational amplifier

ABSTRACT

An operational amplifier has a bias circuit, a differential amplifier, an output stage, and a feed forward circuit. The bias circuit provides a reference. The differential amplifier is coupled to a pair of input terminals and provides a differential output based on the first and second inputs. The output stage responds to the reference and to the differential output so as to supply a current to an output terminal. The feed forward circuit responds to the differential output in order to increase and decrease current to the output terminal. As a result, the feed forward circuit extends the dynamic range of the operational amplifier.

TECHNICAL FIELD OF THE INVENTION

[0001] The present invention relates to an operational amplifier and,more particularly, to an operational amplifier having a wide dynamicrange.

BACKGROUND OF THE INVENTION

[0002] Operational amplifiers have long been used as comparators, audioamplifiers, filters, etc. An operational amplifier is basically adifferential amplifier that amplifies the difference between two inputs.One input has a positive effect on the output signal of the amplifier,and the other input has a negative effect on the output signal. Bothinputs act on the output signal simultaneously, and the output signal isthe sum of both inputs. Accordingly, if both inputs are equal, then theoutput signal is ideally zero.

[0003] An electronic system incorporating an operational amplifier isfrequently required to operate with a large dynamic range. Typically,this requirement means that the electronic system must be able tofunction properly with signal levels ranging from a very small signallevel to a very large signal level. In order for the electronic systemto operate well when the signal level is small, the electronic systemmust introduce very little electronic noise. On the other hand, in orderto handle large signals, the electronic system must behave in a verylinear manner so as not to introduce any distortion into its outputsignal.

[0004] The present invention is directed to an operational amplifierwith a wide dynamic range. Because operational amplifiers are used in awide variety of electronic systems, the operational amplifier of thepresent invention is useful in many applications.

SUMMARY OF THE INVENTION

[0005] In accordance with one aspect of the present invention, anoperational amplifier comprises a bias circuit, an input stage, anoutput stage, and a feed forward circuit. The bias circuit provides areference. The input stage includes a differential amplifier and iscoupled to a pair of input terminals so as to provide an output signalon a differential amplifier output. The output stage is coupled to thereference, to the differential amplifier output, and to an outputterminal. The feed forward circuit is coupled to the differentialamplifier output and to the output stage so as to extend the dynamicrange of the operational amplifier.

[0006] In accordance with another aspect of the present invention, anoperational amplifier comprises a differential amplifier, an outputstage, and a feed forward circuit. The differential amplifier is coupledto a pair of input terminals and provides an output signal on adifferential amplifier output. The output stage has a first activecontrol element coupled between the differential amplifier output and anoutput terminal, and has a second active control element coupled betweena reference and the output terminal. The feed forward circuit is coupledbetween the differential amplifier output and the second active controlelement so as to control increasing and decreasing of current to theoutput terminal in response to the output signal on the differentialamplifier output.

[0007] In accordance with yet another aspect of the present invention, amethod of supplying a differential output based upon first and secondinputs comprises the following: supplying a reference bias to a firstcontrol element of an output stage of an operational amplifier;amplifying a difference between the first and second inputs so as toprovide an output signal; controlling a second control element of theoutput stage in accordance with the output signal so as to control acurrent to an output terminal; and, adjusting the reference bias inaccordance with the output signal in a feed forward manner so as toincrease and decrease the current to the output terminal.

BRIEF DESCRIPTION OF THE DRAWING

[0008] These and other features and advantages will become more apparentfrom a detailed consideration of the invention when taken in conjunctionwith the drawings in which:

[0009]FIG. 1 illustrates a standard two-stage operational amplifier;

[0010]FIG. 2 illustrates the two-stage operational amplifier of FIG. 1incorporating a current mirror;

[0011]FIG. 3 illustrates the two-stage operational amplifier of FIG. 2modified so as to include a feed forward circuit; and,

[0012]FIG. 4 illustrates the two-stage operational amplifier of FIG. 3incorporating input bias cancellation.

DETAILED DESCRIPTION

[0013] An operational amplifier 10 as shown in FIG. 1 is a standardtwo-stage operational amplifier and includes a bias circuit 12, an inputstage 14, and an output stage 16. The bias circuit 12 includes ap-channel transistor 18 and two n-channel transistors 20 and 22. Thedrain and gate regions of the n-channel transistor 20 are coupledtogether and to a source 24 through a resistor 26. The gate and drainregions of the p-channel transistor 18 are coupled together and to thedrain region of the n-channel transistor 22 whose gate region is coupledto the gate and drain regions of the n-channel transistor 20. The biascircuit 12 creates a reference voltage on a reference line 28 for theoutput stage 16.

[0014] The input stage 14 includes three p-channel transistors 32, 34,and 36 and two n-channel transistors 40 and 42. The gate region of thep-channel transistor 32 is coupled to the reference line 28, and thedrain region of the p-channel transistor 32 is coupled to the sourceregions of the p-channel transistors 34 and 36. The gate region of thep-channel transistor 34 is coupled to a first input terminal 44 of theoperational amplifier 10, and the gate region of the p-channeltransistor 36 is coupled to a second input terminal 46 of theoperational amplifier 10. The gate and drain regions of the n-channeltransistor 40 are coupled together, to the drain region of the p-channeltransistor 34, and to the gate region of the n-channel transistor 42.The drain region of the p-channel transistor 36 is coupled to the drainregion of the n-channel transistor 42. The two p-channel transistors 34and 36 form a differential amplifier having an amplifier output 48.Accordingly, the two p-channel transistors 34 and 36 form a differencebetween the signals on the first and second input terminals 44 and 46and supplies this difference as a signal to the amplifier output 48.

[0015] The output stage 16 includes a p-channel transistor 50 and ann-channel transistor 52. The gate region of the p-channel transistor 50is coupled to the reference line 28, and the drain region of thep-channel transistor 50 is coupled to an output terminal 54 of theoperational amplifier 10. The gate region of the n-channel transistor 52is coupled to the amplifier output 48, and the drain region of then-channel transistor 52 is coupled to the output terminal 54. A resistor56 and a capacitor 58 are coupled in series between the amplifier output48 and the output terminal 54. The p-channel transistor 50 acts as anactive load, and the n-channel transistor 52 is an amplifier for thesignal on the amplifier output 48. The resistor 56 and the capacitor 58are used to set the gain and phase performance of the operationalamplifier 10.

[0016] An operational amplifier 60 is shown in FIG. 2 and is similar tothe operational amplifier 10 shown in FIG. 1, differing only by theaddition of a current mirror 62. Accordingly, the same referencenumerals are used in both FIGS. 1 and 2 to depict the same elements andto better illustrate the similarities, and highlight the differences,between the operational amplifier 10 and the operational amplifier 60.

[0017] The current mirror 62 includes two p-channel transistors 64 and66 and two n-channel transistors 68 and 70. The gate region of thep-channel transistor 64 is coupled to the reference line 28, and thedrain region of the p-channel transistor 64 is coupled to the gate anddrain regions of the n-channel transistor 68. The gate and drain regionsof the p-channel transistor 66 are coupled together and to the drainregion of the n-channel transistor 70 whose gate region is coupled tothe gate and drain regions of the n-channel transistor 68. The gate anddrain regions of the p-channel transistor 66 are also coupled to thegate region of the p-channel transistor 50.

[0018] The current mirror 62 converts the voltage reference provided bythe bias circuit 12 on the reference line 28 to a current. This currentis mirrored and is used to create another reference voltage for thep-channel transistor 50 of the output stage 16.

[0019] An operational amplifier 80 is shown in FIG. 3 and is the same asthe operational amplifier 60 shown in FIG. 2 except for the addition ofa p-channel transistor 82 and an n-channel transistor 84 that convertsthe current mirror 62 into a feed forward circuit 86. Accordingly, thesame reference numerals are used in both FIGS. 2 and 3 to depict thesame elements and to better illustrate the similarities, and highlightthe differences, between the operational amplifier 60 and theoperational amplifier 80.

[0020] The gate region of the p-channel transistor 82 and the gateregion of the n-channel transistor 84 are coupled together, to theamplifier output 48 (i.e., the output of the differential amplifierformed by the p-channel transistors 34 and 36), and to the gate of then-channel transistor 52. The drain region of the p-channel transistor 82and the drain region of the n-channel transistor 84 are coupledtogether, to drain region of the p-channel transistor 64, to the gateand drain regions of the n-channel transistor 68, and to the gate regionof the n-channel transistor 70. The feed forward circuit 86, therefore,comprises the p-channel transistors 64, 66, and 82 and the n-channeltransistors 68, 70, and 84. In addition, a capacitor 88 is coupledbetween the gate and drain regions of the p-channel transistor 50 of theoutput stage 16 in order to provide compensation so as to preserve thegain and phase performance of the operational amplifier 80.

[0021] The feed forward circuit 86 monitors the output on the amplifieroutput 48 of the input stage 14 and dynamically changes the bias currentsupplied by the p-channel transistor 50 of the output stage 16 to theoutput terminal 54. Thus, when the output of the input stage 14 is high,the feed forward circuit 86 decreases the bias current in the outputstage 16, thereby reducing the current supplied by the p-channeltransistor 50. On the other hand, when the output of the input stage 14is low, the feed forward circuit 86 increases the current in thep-channel transistor 50, making more current available to source anexternal load coupled to the output terminal 54. The overall effect ofthis operation is to significantly improve the distortion performance ofthe operational amplifier 80 in a manner that negligibly decreases itsnoise performance.

[0022] An operational amplifier 100 is shown in FIG. 4 and is the sameas the operational amplifier 80 shown in FIG. 3 except for the additionof an input bias cancellation circuit 102 comprising a p-channeltransistor 104, four n-channel transistors 106, 108, 110, and 112, and alateral PNP (LPNP) transistor 114. In addition, the p-channeltransistors 34 and 36 have been replaced by corresponding LPNPtransistors 34 a and 36 a in order to lower flicker noise in theoperational amplifier 100. Otherwise, the same reference numerals areused in both FIGS. 3 and 4 to depict the same elements and to betterillustrate the similarities, and highlight the differences, between theoperational amplifier 80 and the operational amplifier 100.

[0023] The gate region of the p-channel transistor 104 is coupled to thereference line 28, and the drain region of the p-channel transistor 104is coupled to the emitter of the LPNP transistor 114. The collector ofthe LPNP transistor 114 is coupled to the gate and drain regions of then-channel transistor 108. The gate and drain regions of the n-channeltransistor 106 are coupled together, and to the gate regions of then-channel transistors 110 and 112. The drain region of the n-channeltransistor 110 is coupled to the first input terminal 44, and the drainregion of the n-channel transistor 112 is coupled to the second inputterminal 46.

[0024] The input bias cancellation circuit 102 is provided to cancel thebase current of the LPNP transistors 34 a and 36 a in a manner whichtracks process variations in the Beta parameter of the LPNP transistors,while not adding substantial noise.

[0025] Accordingly, the operational amplifiers 80 and 100 minimize thenoise that is typically introduced by operational amplifiers and at thesame time the operational amplifiers 80 and 100 minimize distortion. Thefeed forward circuit 86 of the operational amplifiers 80 and 100 makesmore current available at the output terminal 54 when more current isrequired for the load, and reduces current from the output terminal 54when less current is required for the load. The resistor 56 and thecapacitor 58 maintain an acceptable AC response and ensure stableamplifier operation.

[0026] Certain modifications and/or alternatives of the presentinvention have been discussed above. Other modifications and/oralternatives will occur to those practicing in the art of the presentinvention. For example, specific types of transistors have beendescribed above for the bias circuit 12, the input stage 14, the outputstage 16, the feed forward circuit 86, and the input bias cancellationcircuit 102. However, other types of transistors or other active devicescan be used for the bias circuit 12, the input stage 14, the outputstage 16, the feed forward circuit 86, and/or the input biascancellation circuit 102.

[0027] Moreover, fewer or more stages and/or circuits and/or elementsthan those described herein may be used for the present invention.Therefore, if a claim recites fewer stages and/or circuits and/orelements than those shown in the drawings and described above, suchclaim should not be interpreted as including any omitted stage, circuit,and/or element.

[0028] Accordingly, the description of the present invention is to beconstrued as illustrative only and is for the purpose of teaching thoseskilled in the art the best mode of carrying out the invention. Thedetails may be varied substantially without departing from the spirit ofthe invention, and the exclusive use of all modifications which arewithin the scope of the appended claims is reserved.

We claim:
 1. An operational amplifier comprising: a bias circuitarranged to provide a reference; an input stage including a differentialamplifier, wherein the input stage is coupled to a pair of inputterminals and is arranged to provide an output signal on a differentialamplifier output; an output stage coupled to the reference, to thedifferential amplifier output, and to an output terminal; and, a feedforward circuit coupled to the differential amplifier output and to theoutput stage so as to extend the dynamic range of the operationalamplifier.
 2. The operational amplifier of claim 1 wherein the feedforward circuit is arranged to drive the output stage so as to providemore current when a load coupled to the output terminal requires morecurrent and to drive the output stage so as to reduce current when theload coupled to the output terminal requires less current.
 3. Theoperational amplifier of claim 2 wherein the feed forward circuit isarranged to control the reference supplied by the bias circuit to theoutput stage so as to drive the output stage to provide more currentwhen a load coupled to the output terminal requires more current and todrive the output stage to reduce current when the load coupled to theoutput terminal requires less current.
 4. The operational amplifier ofclaim 1 wherein the bias circuit is arranged to provide a voltagereference, and wherein the feed forward circuit includes a currentmirror that converts the voltage reference to a current reference andback to a voltage reference for supply to the output stage.
 5. Theoperational amplifier of claim 1 wherein the output stage includes acompensation circuit to set the gain and phase of the operationalamplifier.
 6. The operational amplifier of claim 5 wherein thecompensation circuit comprises a resistor and a capacitor.
 7. Theoperational amplifier of claim 1 wherein the feed forward circuit isarranged to drive the output stage so as to provide more current when aload coupled to the output terminal requires more current and to drivethe output stage so as to reduce current when the load coupled to theoutput terminal requires less current, wherein the bias circuit isarranged to provide a voltage reference, and wherein the feed forwardcircuit includes a current mirror that converts the voltage reference toa current reference and back to a voltage reference for supply to theoutput stage.
 8. The operational amplifier of claim 7 wherein the feedforward circuit is arranged to control the voltage reference supplied tothe output stage so as to drive the output stage to provide more currentwhen a load coupled to the output terminal requires more current and soas to drive the output stage to reduce current when the load coupled tothe output terminal requires less current.
 9. The operational amplifierof claim 1 wherein the feed forward circuit is arranged to drive theoutput stage so as to provide more current when a load coupled to theoutput terminal requires more current and to drive the output stage soas to reduce current when the load coupled to the output terminalrequires less current, and wherein the output stage includes acompensation circuit to set the gain and phase of the operationalamplifier.
 10. The operational amplifier of claim 9 wherein the feedforward circuit is arranged to control the reference supplied by thebias circuit to the output stage so as to drive the output stage toprovide more current when a load coupled to the output terminal requiresmore current and to drive the output stage to reduce current when theload coupled to the output terminal requires less current.
 11. Theoperational amplifier of claim 1 wherein the bias circuit is arranged toprovide a voltage reference, wherein the feed forward circuit includes acurrent mirror that converts the voltage reference to a currentreference and back to a voltage reference for supply to the outputstage, and wherein the output stage includes a compensation circuit toset the gain and phase of the operational amplifier.
 12. The operationalamplifier of claim 11 wherein the compensation circuit comprises aresistor and a capacitor.
 13. The operational amplifier of claim 1wherein the feed forward circuit is arranged to drive the output stageso as to provide more current when a load coupled to the output terminalrequires more current and to drive the output stage so as to reducecurrent when the load coupled to the output terminal requires lesscurrent, wherein the bias circuit is arranged to provide a voltagereference, wherein the feed forward circuit includes a current mirrorthat converts the voltage reference to a current reference and back to avoltage reference for supply to the output stage, and wherein the outputstage includes a compensation circuit to set the gain and phase of theoperational amplifier.
 14. The operational amplifier of claim 13 whereinthe compensation circuit comprises a resistor and a capacitor.
 15. Theoperational amplifier of claim 13 wherein the feed forward circuit isarranged to control the reference supplied by the bias circuit to theoutput stage so as to drive the output stage to provide more currentwhen a load coupled to the output terminal requires more current and todrive the output stage to reduce current when the load coupled to theoutput terminal requires less current.
 16. The operational amplifier ofclaim 1 wherein the bias circuit, the output stage, and the feed forwardcircuit include p-channel and n-channel transistors, and wherein thedifferential amplifier comprises bipolar transistors.
 17. Theoperational amplifier of claim 16 further comprising an input biascancellation circuit arranged to cancel base currents of the lateralbipolar transistors so as to track variations in Beta.
 18. Anoperational amplifier comprising: a differential amplifier coupled to apair of input terminals and arranged to provide an output signal on adifferential amplifier output; an output stage having a first activecontrol element coupled between the differential amplifier output and anoutput terminal and a second active control element coupled between areference and the output terminal; and, a feed forward circuit coupledbetween the differential amplifier output and the second active controlelement so as to control increasing and decreasing of current to theoutput terminal in response to the output signal on the differentialamplifier output.
 19. The operational amplifier of claim 18 wherein thefirst active control element comprises a first transistor having a gateand a source/drain circuit, wherein the second active control elementcomprises a second transistor having a gate and a source/drain circuit,wherein the gate the first transistor is coupled to the differentialamplifier output, wherein the gate of the second transistor is coupledto the feed forward circuit, and wherein the source/drain circuit of thefirst transistor and the source/drain circuit of the second transistorare coupled to the output terminal.
 20. The operational amplifier ofclaim 18 wherein the output stage includes a compensation circuit to setthe gain and phase of the operational amplifier.
 21. The operationalamplifier of claim 20 wherein the compensation circuit comprises aresistor and a capacitor.
 22. The operational amplifier of claim 20wherein the first active control element comprise a first transistorhaving a gate and a source/drain circuit, wherein the second activecontrol element comprises a second transistor having a gate and asource/drain circuit, wherein the gate the first transistor is coupledto the differential amplifier output, wherein the gate of the secondtransistor is coupled to the feed forward circuit, and wherein thesource/drain circuit of the first transistor and the source/draincircuit of the second transistor are coupled to the output terminal. 23.The operational amplifier of claim 22 wherein the compensation circuitcomprises a resistor and a capacitor.
 24. The operational amplifier ofclaim 18 wherein the output stage and the feed forward circuit includep-channel and n-channel transistors, and wherein the differentialamplifier comprises bipolar transistors.
 25. The operational amplifierof claim 18 wherein each of the first and second active control elementscomprises a corresponding transistor.
 26. A method of supplying adifferential output based upon first and second inputs comprising:supplying a reference bias to a first control element of an output stageof an operational amplifier; amplifying a difference between the firstand second inputs so as to provide a differential output; controlling asecond control element of the output stage in accordance with thedifferential output so as to control a current to an output terminal;and, adjusting the reference bias in accordance with the differentialoutput in a feed forward manner so as to increase and decrease thecurrent to the output terminal.
 27. The method of claim 26 furthercomprising setting the gain and phase of the operational amplifier. 28.The method of claim 26 further comprising canceling base currents of apair of bipolar transistors of the differential amplifier so as to trackvariations in Beta.
 29. The method of claim 28 further comprisingsetting the gain and phase of the operational amplifier.
 30. The methodof claim 26 wherein each of the first and second active control elementscomprises a corresponding transistor.